View NCP1729-D_1965886.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? semiconductor components industries, llc, 2001 april, 2001 rev. 1 1 publication order number: ncp1729/d ncp1729 switched capacitor voltage inverter the ncp1729 is a cmos charge pump voltage inverter that is designed for operation over an input voltage range of 1.15 v to 5.5 v with an output current capability in excess of 50 ma. the operating current consumption is only 122 a, and a power saving shutdown input is provided to further reduce the current to a mere 0.4 a. the device contains a 35 khz oscillator that drives four low resistance mosfet switches, yielding a low output resistance of 26 and a voltage conversion efficiency of 99%. this device requires only two external 3.3 f capacitors for a complete inverter making it an ideal solution for numerous battery powered and board level applications. the ncp1729 is available in the space saving tsop6 (sot236) package. features ? operating voltage range of 1.15 v to 5.5 v ? output current capability in excess of 50 ma ? low current consumption of 122 a ? power saving shutdown input for a reduced current of 0.4 a ? operation at 35 khz ? low output resistance of 26 ? space saving tsop6 (sot236) package typical applications ? lcd panel bias ? cellular telephones ? pagers ? personal digital assistants ? electronic games ? digital cameras ? camcorders ? hand held instruments 6 4 2 3 1 figure 1. typical application v out v in 5 this device contains 77 active transistors. http://onsemi.com pin connections 1 3 gnd v out 2 c 4 c+ 6 (top view) device package shipping ordering information ncp1729sn35t1 tsop6 3000 tape & reel 5 shdn tsop6 sn suffix case 318g marking diagram eadyw ead = device code y = year w = work week 1 6 1 6 v in
ncp1729 http://onsemi.com 2 maximum ratings* rating symbol value unit input voltage range (v in to gnd) v in 0.3 to 6.0 v output voltage range (v out to gnd) v out 6.0 to 0.3 v output current (note 1.) i out 100 ma output short circuit duration (v out to gnd, note 1.) t sc indefinite sec operating junction temperature t j 150 c power dissipation and thermal characteristics thermal resistance, junction to air maximum power dissipation @ t a = 70 c r q ja p d 256 313 c/w mw storage temperature t stg 55 to 150 c *esd ratings esd machine model protection up to 200 v, class b esd human body model protection up to 2000 v, class 2 electrical characteristics (v in = 5.0 v, c 1 = 3.3 m f, c 2 = 3.3 m f, t a = 40 c to 85 c, typical values shown are for t a = 25 c unless otherwise noted. see figure 14 for test setup.) characteristic symbol min typ max unit operating supply voltage range (shdn = v in , r l = 10 k) v in 1.5 to 5.5 1.15 to 6.0 v supply current device operating (shdn = 5.0 v, r l = ) t a = 25 c t a = 85 c i in 122 128 200 200 m a supply current device shutdown (shdn = 0 v) t a = 25 c t a = 85 c i shdn 0.4 1.7 m a oscillator frequency t a = 25 c t a = 40 c to 85 c f osc 24.5 19 33.5 45.6 54 khz output resistance (i out = 25 ma, note 2.) r out 26 50 w voltage conversion efficiency (r l = ) v eff 99 99.9 % power conversion efficiency (r l = 1.0 k) p eff 96 % shutdown input threshold voltage (v in = 1.5 v to 5.5 v) high state, device operating low state, device shutdown v th(shdn ) 0.6 v in 0.5 v in v shutdown input bias current high state, device operating, shdn = 5.0 v t a = 25 c t a = 85 c low state, device shutdown, shdn = 0 v t a = 25 c t a = 85 c i ih i il 5.0 100 5.0 100 pa wakeup time from shutdown (r l = 1.0 k) t wkup 1.0 ms 1. maximum package power dissipation limits must be observed to ensure that the maximum junction temperature is not exceeded. t j t a (p d r ja ) 2. capacitors c 1 and c 2 contribution is approximately 20% of the total output resistance.
ncp1729 http://onsemi.com 3 130 120 100 110 90 80 40 33 34 32 35 36 37 38 39 200 r out , output resistance ( w ) t a , ambient temperature ( c) figure 2. output resistance vs. supply voltage figure 3. output resistance vs. ambient temperature r out , output resistance ( w ) 0 35 30 25 20 50 20 10 15 10 5 0 40 figure 4. output current vs. capacitance c 1 , c 2 , c 3 , capacitance ( m f) figure 5. output voltage ripple vs. capacitance c 1 , c 2 , c 3 , capacitance ( m f) v out , output voltage ripple (mv pp ) i out , output current (ma) figure 6. supply current vs. supply voltage v in , supply voltage (v) figure 7. oscillator frequency vs. ambient temperature t a , ambient temperature ( c) i in , supply current ( m a) f osc , oscillator frequency (khz) 50 25 100 100 250 50 150 0 300 350 figure 14 test setup t a = 25 c v in = 1.5 v t a = 85 c v in , supply voltage (v) 60 30 80 20 40 50 70 90 100 25 0 50 75 30 0 50 20 10 40 30 70 60 50 1.5 3.0 2.5 2.0 3.5 4.0 4.5 5.0 50 25 100 25 0 50 75 figure 14 test setup v in = 2.0 v v in = 3.3 v v in = 5.0 v v in = 4.75 v v out = 4.00 v v in = 3.15 v v out = 2.50 v v in = 1.90 v v out = 1.50 v figure 14 test setup t a = 25 c figure 14 test setup r l = t a = 25 c t a = 40 c v in = 1.5 v v in = 3.3 v v in = 5.0 v figure 14 test setup figure 14 test setup t a = 25 c 20 60 40 80 70 50 30 90 100 1.0 5.0 3.5 2.5 5.5 4.5 4.0 3.0 2.0 1.5 v in = 4.75 v v out = 4.00 v v in = 3.15 v v out = 2.50 v v in = 1.90 v v out = 1.50 v
ncp1729 http://onsemi.com 4 , power conversion efficiency (%) 80 60 90 50 70 40 100 1.00 2.0 5.0 v out , output voltage (v) 6.0 i out , output current (ma) figure 8. output voltage vs. output current figure 9. power conversion efficiency vs. output current figure 10. output voltage ripple and noise time = 10 m s / div. figure 11. shutdown supply current vs. ambient temperature t a , ambient temperature ( c) i shdn , shutdown supply current ( m a) output voltage ripple and noise = 10 mv / div. ac coupled figure 12. supply voltage vs. shutdown input voltage threshold 0.0 50 50 75 25 0 100 25 0.50 1.25 0.75 0.25 1.50 1.75 i out , output current (ma) 4.0 3.0 1.0 050 20 10 40 30 0 50 20 10 40 30 v in = 2.0 v v in = 3.3 v v in = 5.0 v r l = 10 k w shdn = gnd figure 14 test setup t a = 25 c v in = 1.5 v v in = 3.3 v v in = 5.0 v v in = 1.5 v v in = 2.0 v v in = 3.3 v v in = 5.0 v figure 14 test setup v in = 3.3 v i out = 5.0 ma t a = 25 c figure 13. wakeup time from shutdown time = 400 m s / div. wakeup time from shutdown v in = 5.0 v r l = 1.0 k t a = 25 c v out = 1.0 v/div. shdn = 5.0v/div. figure 14 test setup t a = 25 c v in , supply voltage (v) 0.5 2.5 2.0 1.5 1.0 3.0 low state, device shutdown t a = 25 c high state, device operating v th(shnd ) , shutdown input voltage threshold (v) 5.0 4.5 3.5 4.0 3.0 2.5 1.5 2.0
ncp1729 http://onsemi.com 5 6 4 2 3 1 osc v out c 1 c 2 r l + + c 3 v in + figure 14. test setup/voltage inverter 5 c 1 = c 2 = c 3 = 3.3 f detailed operating description the ncp1729 charge pump converter inverts the voltage applied to the v in pin. conversion consists of a twophase operation (figure 15). during the first phase, switches s 2 and s 4 are open and s 1 and s 3 are closed. during this time, c 1 charges to the voltage on v in and load current is supplied from c 2 . during the second phase, s 2 and s 4 are closed, and s 1 and s 3 are open. this action connects c 1 across c 2 , restoring charge to c 2 . figure 15. ideal switched capacitor charge pump s3 s4 c 2 c 1 s1 s2 v in v out from osc applications information output voltage considerations the ncp1729 performs voltage conversion but does not provide regulation. the output voltage will drop in a linear manner with respect to load current. the value of this equivalent output resistance is approximately 26 w nominal at 25 c with v in = 5.0 v. v out is approximately 5.0 v at light loads, and drops according to the equation below: v drop i out r out v out (v in v drop ) charge pump efficiency the overall power conversion efficiency of the charge pump is affected by four factors: 1. losses from power consumed by the internal oscillator, switch drive, etc. (which vary with input voltage, temperature and oscillator frequency). 2. i 2 r losses due to the onresistance of the mosfet switches onboard the charge pump. 3. charge pump capacitor losses due to equivalent series resistance (esr). 4. losses that occur during charge transfer from the commutation capacitor to the output capacitor when a voltage difference between the two capacitors exists. most of the conversion losses are due to factors 2, 3 and 4. these losses are given by equation 1. p loss(2,3,4) i out 2 r out i out 2 1 (f osc )c 1 8r switch 4esr c 1 esr c 2 (eq. 1) the 1/(f osc )(c 1 ) term in equation 1 is the ef fective output resistance of an ideal switched capacitor circuit (figures 16 and 17). the losses due to charge transfer above are also shown in equation 2. the output voltage ripple is given by equation 3. 0.5c 2 (v ripple 2 2v out v ripple )] f osc p loss [0.5c 1 (v in 2 v out 2 ) (eq. 2) v ripple i out (f osc )(c 2 ) 2(i out )(esr c 2 ) (eq. 3) r l c 2 c 1 v in v out f figure 16. ideal switched capacitor model r l c 2 v in v out r equiv r equiv 1 f c 1 figure 17. equivalent output resistance
ncp1729 http://onsemi.com 6 capacitor selection in order to maintain the lowest output resistance and output ripple voltage, it is recommended that low esr capacitors be used. additionally, larger values of c 1 will lower the output resistance and larger values of c 2 will reduce output voltage ripple. (see equation 3). table 1 shows various values of c 1 , c 2 and c 3 with the corresponding output resistance values at 25 c. table 2 shows the output voltage ripple for various values of c 1 , c 2 and c 3 . the data in tables 1 and 2 was measured not calculated. table 1. output resistance vs. capacitance (c 1 = c 2 = c 3 ), v in = 4.75 v and v out = 4.0 v c 1 = c 2 = c 3 ( f) r out ( ) 0.68 55.4 1.3 36.9 3.3 26.0 7.3 25.8 10 25.5 24 25.0 50 24.0 table 2. output voltage ripple vs. capacitance (c 1 = c 2 = c 3 ), v in = 4.75 v and v out = 4.0 v c 1 = c 2 = c 3 ( f) output voltage ripple (mv) 0.68 322 1.3 205 3.3 120 7.3 69 10 56 24 32 50 20 input supply bypassing the input voltage, v in should be capacitively bypassed to reduce ac impedance and minimize noise effects due to the switching internals in the device. if the device is loaded from v out to gnd, it is recommended that a large value capacitor (at least equal to c 1 ) be connected from v in to gnd. if the device is loaded from v in to v out , a small (0.7 m f) capacitor between the pins is sufficient. voltage inverter the most common application for a charge pump is the voltage inverter (figure 14). this application uses two or three external capacitors. the c 1 (pump capacitor) and c 2 (output capacitor) are required. the input bypass capacitor c 3 , may be necessary depending on the application. the output is equal to v in plus any voltage drops due to loading. refer to tables 1 and 2 for capacitor selection. the test setup used for the majority of the characterization is shown in figure 14. layout considerations as with any switching power supply circuit, good layout practice is recommended. mount components as close together as possible to minimize stray inductance and capacitance. also use a large ground plane to minimize noise leakage into other circuitry. capacitor resources selecting the proper type of capacitor can reduce switching loss. low esr capacitors are recommended. the ncp1729 was characterized using the capacitors listed in table 3. this list identifies low esr capacitors for the voltage inverter application. table 3. capacitor types manufacturer/contact part types/series avx tps avx 8434489411 tps www.avxcorp.com cornell dubilier esrd cornell d u bilier 5089968561 ll d bili esrd www.cornelldubilier.com san y o/oscon sn sanyo/oscon 6196616835 id / ht sn svp www.sanyovideo.com/oscon.htm visha y 593d vishay 6032241961 ih 593d 594 www.vishay.com
ncp1729 http://onsemi.com 7 6 4 2 3 1 osc capacitors = 3.3 m f + + v in 5 + v out figure 18. voltage inverter the ncp1729 primary function is a voltage inverter. the device will convert 5.0 v into 5.0 v with light loads. two capacitors are required for the inverter to function. a third capacitor, the input bypass capacitor, may be required depending on the power source for the inverter. the performance for this device is illustrated below. figure 19. voltage inverter load regulation, output voltage vs. output current 0 2.0 30 5.0 20 10 v out , output voltage (v) 6.0 0 i out , output current (ma) 4.0 3.0 1.0 40 50 t a = 25 c v in = 3.3 v v in = 5.0 v
ncp1729 http://onsemi.com 8 figure 20. cascaded devices for increased negative output voltage + 6 4 2 3 1 osc capacitors = 3.3 m f + v in 5 + 6 4 2 3 1 osc + 5 v out + two or more devices can be cascaded for increased output voltage. under light load conditions, the output voltage is approximately equal to v in times the number of stages. the converter output resistance increases dramatically with each additional stage. this is due to a reduction of input voltage to each successive stage as the converter output is loaded. note that the ground connection for each successive stage must connect to the negative output of the previous stage. the performance characteristics for a converter consisting of two cascaded devices are shown below. figure 21. cascade load regulation, output voltage vs. output current 2.0 4.0 1.0 5.0 3.0 10.0 i out , output current (ma) v out , output voltage (v) 02040 6.0 7.0 8.0 9.0 10 30 a b t a = 25 c a 5.0 145 b 3.0 180 curve v in (v) r out ( w )
ncp1729 http://onsemi.com 9 + 6 4 2 3 1 osc capacitors = 3.3 m f + + v in 5 + + v out figure 22. negative output voltage doubler a single device can be used to construct a negative voltage doubler. the output voltage is approximately equal to 2v in minus the forward voltage drop of each external diode. the performance characteristics for the above converter are shown below. note that curves a and c show the circuit performance with economical 1n4148 diodes, while curves b and d are with lower loss mbra120e schottky diodes. 0 0 2.0 20 10 4.0 6.0 10.0 30 40 i out , output current (ma) v out , output voltage (v) 8.0 figure 23. doubler load regulation, output voltage vs. output current a b t a = 25 c c d a 3.0 1n4148 b 3.0 mbra120e curve v in (v) all diodes 118 107 r out ( ) c 5.0 1n4148 d 5.0 mbra120e 91 85
ncp1729 http://onsemi.com 10 + 6 4 2 3 1 osc capacitors = 3.3 m f + + v in 5 + + v out + + figure 24. negative output voltage tripler a single device can be used to construct a negative voltage tripler. the output voltage is approximately equal to 3v in minus the forward voltage drop of each external diode. the performance characteristics for the above converter are shown below. note that curves a and c show the circuit performance with economical 1n4148 diodes, while curves b and d are with lower loss mbra120e schottky diodes. 6.0 i out , output current v out , output voltage 040 30 20 10 50 10.0 4.0 12.0 8.0 16.0 2.0 0 14.0 figure 25. tripler load regulation, output voltage vs. output current a b t a = 25 c c d a 3.0 1n4148 b 3.0 mbra120e curve v in (v) all diodes 247 228 r out ( ) c 5.0 1n4148 d 5.0 mbra120e 198 188
ncp1729 http://onsemi.com 11 + + 6 4 2 3 1 osc capacitors = 3.3 m f + v in 5 v out figure 26. positive output voltage doubler a single device can be used to construct a positive voltage doubler. the output voltage is approximately equal to 2v in minus the forward voltage drop of each external diode. the performance characteristics for the above converter are shown below. note that curves a and c show the circuit performance with economical 1n4148 diodes, while curves b and d are with lower loss mbra120e schottky diodes. 10.0 8.0 6.0 4.0 2.0 0 i out , output current (ma) v out , output voltage (v) 020 10 30 40 figure 27. doubler load regulation, output voltage vs. output current a b t a = 25 c c d a 3.0 1n4148 b 3.0 mbra120e curve v in (v) all diodes 32 25 r out ( ) c 5.0 1n4148 d 5.0 mbra120e 24 19.3
ncp1729 http://onsemi.com 12 + + 6 4 2 3 1 osc capacitors = 3.3 m f + v in 5 v out + + figure 28. positive output voltage tripler a single device can be used to construct a positive voltage tripler. the output voltage is approximately equal to 3v in minus the forward voltage drop of each external diode. the performance characteristics for the above converter are shown below. note that curves a and c show the circuit performance with economical 1n4148 diodes, while curves b and d are with lower loss mbra120e schottky diodes. 6.0 2.0 4.0 0 8.0 10.0 12.0 14.0 i out , output current (ma) v out , output voltage (v) 030 20 10 50 figure 29. tripler load regulation, output voltage vs. output current a b t a = 25 c c d a 3.0 1n4148 b 3.0 mbra120e curve v in (v) all diodes 110 95 r out ( ) c 5.0 1n4148 d 5.0 mbra120e 88 78 40
ncp1729 http://onsemi.com 13 + 6 4 2 3 1 osc + v in 5 v out + figure 30. load regulated negative output voltage capacitors = 3.3 m f 100 k a zener diode can be used with the shutdown input to provide closed loop regulation performance. this significantly reduces the converter's output resistance and dramatically enhances the load regulation. for closed loop operation, the desired regulated output voltage must be lower in magnitude than v in . the output will regulate at a level of v z + v th(shdn ) . note that the shutdown input voltage threshold is typically 0.5 v in and therefore, the regulated output voltage will change proportional to the converter's input. this characteristic will not present a problem when used in applications with constant input voltage. in this case the zener breakdown was measured at 25 a. the performance characteristics for the above converter are shown below. note that the dashed curve sections represent the converter's open loop performance. 0 2.0 30 20 10 v out , output voltage (v) 5.0 1.0 i out , output current (ma) 4.0 3.0 40 70 50 figure 31. load regulation, output voltage vs. output current a b a 3.3 3.9 b 5.0 6.5 curve v in (v) v z (v) 2.1 3.8 v out (v) 60 t a = 25 c
ncp1729 http://onsemi.com 14 capacitors = 3.3 m f + 6 4 2 3 1 osc + v in 5 v out + r 1 r 2 10 k figure 32. line and load regulated negative output voltage an adjustable shunt regulator can be used with the shutdown input to give excellent closed loop regulation performance. the shunt regulator acts as a comparator with a precise input offset voltage which significantly reduces the converter's output resistance and dramatically enhances the line and load regulation. for closed loop operation, the desired regulated output voltage must be lower in magnitude than v in . the output will regulate at a level of v ref (r 2 /r 1 + 1). the adjustable shunt regulator can be from either the tlv431 or tl431 families. the comparator offset or reference voltage is 1.25 v or 2.5 v respectively. the performance characteristics for the converter are shown below. note that the dashed curve sections represent the converter's open loop performance. 2.0 3.0 1.0 4.0 5.0 i out , output current (ma) v out , output voltage (v) 030 70 10 20 40 50 60 figure 33. load regulation, output voltage vs. output current a b t a = 25 c a 3.0 5.0 k b 5.0 24 k curve v in (v) r 2 ( ) 1.8 4.2 v out (v) 10 k 10 k r 1 ( ) 2.5 0.5 3.5 4.5 v in , input voltage (v) v out , output voltage (v) 1.0 3.0 2.0 4.0 5.0 6.0 figure 34. line regulation, output voltage vs. input current 1.5 i out = 25 ma r 1 = 10 k r 2 = 24 k t a = 25 c
ncp1729 http://onsemi.com 15 + 6 4 2 3 1 osc capacitors = 3.3 m f v in 5 6 4 2 3 1 osc + 5 v out + + figure 35. paralleling devices for increased negative output current an increase in converter output current capability with a reduction in output resistance can be obtained by paralleling two or more devices. the output current capability is approximately equal to the number of devices paralleled. a single shared output capacitor is sufficient for proper operation but each device does require its own pump capacitor. note that the output ripple frequency will be complex since the oscillators are not synchronized. the output resistance is approximately equal to the output resistance of one device divided by the total number of devices paralleled. the performance characteristics for a converter consisting of two paralleled devices is shown below. 0 1.0 2.0 40 30 20 3.0 4.0 5.0 10 50 80 100 i out , output current (ma) v out , output voltage (v) 60 70 90 figure 36. parallel load regulation, output voltage vs. output current a b a 5.0 b 3.0 curve v in (v) 14 17 r out ( w ) t a = 25 c
ncp1729 http://onsemi.com 16 + 6 4 2 3 1 osc + v in 5 v out q 1 c 3 v out = v in v be(q1) v be(q2) 2 v f + c 2 q 2 c 1 c 1 = c 2 = 470 m f c 3 = 220 m f q 1 = pzt751 q 2 = pzt651 figure 37. external switch for increased negative output current the output current capability of the ncp1729 can be extended beyond 600 ma with the addition of two external switch transistors and two schottky diodes. the output voltage is approximately equal to v in minus the sum of the base emitter drops of both transistors and the forward voltage of both diodes. the performance characteristics for the converter are shown below. note that the output resistance is reduced to 1.0 ohms. 2.6 i out , output current (ma) v out , output voltage (v) 0 0.4 0.5 0.3 0.2 0.1 0.6 3.2 2.4 2.8 2.2 2.0 figure 38. current boosted load regulation, output voltage vs. output current v in = 5.0 v r out = 1.0 w t a = 25 c 3.0
ncp1729 http://onsemi.com 17 + 6 4 2 3 1 osc + v in 5 v out q 1 c 3 + c 2 q 2 c 1 c 1 = c 2 = 470 m f c 3 = 220 m f q 1 = pzt751 q 2 = pzt651 figure 39. line and load regulated negative output voltage with high current capability r 1 r 2 10 k this converter is a combination of figures 37 and 32. it provides a line and load regulated output of 2.47 v at up to 300 ma with an input voltage of 5.0 v. the output will regulate at a level of v ref (r 2 /r 1 + 1). the performance characteristics are shown below. note that the dashed line is the open loop and the solid line is the closed loop configuration for the load regulation. 2.6 i out , output current (a) v out , output voltage (v) 0 0.4 0.5 0.3 0.2 0.1 0.6 3.2 2.4 2.8 2.2 2.0 figure 40. current boosted load regulation, output voltage vs. output current v in = 5.0 v r out = 1.0 w r 1 = r 2 = 10 k w t a = 25 c 3.0 1.6 v in , input voltage (v) v out , output voltage (v) 2.5 4.5 5.0 4.0 3.5 3.0 5.5 2.6 1.1 2.1 0.6 0.1 figure 41. current boosted line regulation, output voltage vs. output current i out = 100 ma r 1 = r 2 = 10 k w t a = 25 c
ncp1729 http://onsemi.com 18 figure 42. positive output voltage doubler with high current capability + 6 4 2 3 1 osc + v in 5 v out q 1 c 3 + c 2 q 2 c 1 capacitors = 220 m f q 1 = pzt751 q 2 = pzt651 50 50 the ncp1729 can be configured to produce a positive output voltage doubler with current capability of 500 ma. this is accomplished with the addition of two external switch transistors and two schottky diodes. the output voltage is approximately equal to 2v in minus the sum of the base emitter drops of both transistors and the forward voltage of both diodes. the performance characteristics for the converter is shown below. note that the output resistance is reduced to 1.8 ohms. 8.0 i out , output current (ma) v out , output voltage (v) 0 0.4 0.5 0.3 0.2 0.1 7.2 8.4 7.6 8.8 figure 43. positive doubler with current boosted load regulation, output voltage vs. output current v in = 5.0 v r out = 1.8 w t a = 25 c
ncp1729 http://onsemi.com 19 figure 44. line and load regulated positive output voltage doubler with high current capability + 6 4 2 3 1 osc + v in 5 v out q 1 c 3 + c 2 q 2 c 1 capacitors = 220 m f q 1 = pzt751 q 2 = pzt651 r 2 r 1 10 k 50 50 this converter is a combination of figures 42 and the shunt regulator to close the loop. in this case the anode of the regulator is connected to ground. it provides a line and load regulated output of 7.6 v at up to 300 ma with a input voltage of 5.0 v. th e output will regulate at a level of v ref (r 2 /r 1 + 1). the open loop configuration is the dashed line and the closed loop is the solid line. the performance characteristics are shown below. 8.0 i out , output current (a) v out , output voltage (v) 0 0.4 0.5 0.3 0.2 0.1 0.6 8.4 7.6 8.8 figure 45. current boosted close loop load regulation, output voltage vs. output current v in = 5.0 v r out = 1.8 w open loop r out = 0.5 w closed loop r 1 = 10 k r 2 = 51.3 k w t a = 25 c 7.2 6.0 v in , input voltge (v) v out , output voltage (v) 1.0 4.0 5.0 3.0 2.0 6.0 1.0 7.0 5.0 8.0 figure 46. current boosted close loop line regulation, output voltage vs. input voltage i out = 100 ma r 1 = 10 k r 2 = 51.3 k w t a = 25 c 4.0 3.0 2.0 8.6 8.2 7.8 7.4
ncp1729 http://onsemi.com 20 6 4 2 3 1 osc capacitors = 3.3 m f + v in = 5.0 v 5 + + figure 47. negative input voltage splitter c c + c v out = 2.5 v c a single device can be used to split a negative input voltage. the output voltage is approximately equal to v in /2. the performance characteristics are shown below. note that the converter has an output resistance of 10 ohms. 2.1 i out , output current (ma) v out , output voltage (v) 040 30 20 10 50 1.9 2.3 2.5 1.7 1.5 figure 48. negative voltage splitter load regulation, output voltage vs. output current rout = 10 w t a = 25 c 60 70 80
ncp1729 http://onsemi.com 21 figure 49. combination of a closed loop negative inverter with a positive output voltage doubler + 6 4 2 3 1 osc + v in 5 v out + capacitors = 10 m f 10 k + + r 1 r 2 +v out all of the previously shown converter circuits have only single outputs. applications requiring multiple outputs can be constructed by incorporating combinations of the former circuits. the converter shown above combines figures 26 and 32 to form a regulated negative output inverter with a nonregulated positive output doubler. the magnitude of v out is controlled by the resistor values and follows the relationship v ref (r 2 /r 1 + 1). since the positive output is not within the feedback loop, its output voltage will increase as the negative output load increases. this cross regulation characteristic is shown in the up per portion of figure 50. the dashed line is the open loop and the solid line is the closed loop configuration for the load regulation. the load regulation for the positive doubler with a constant load on the v out is shown in figure 51. figure 50. load regulation, output voltage vs. output current figure 51. load regulation, output voltage vs. output current 4.0 5.0 3.0 8.0 9.0 i out , negative inverter output current (ma) v out , output voltage (v) 020 10 30 8.0 7.0 9.0 10.0 i out , positive doubler output current (ma) v out , output voltage (v) 030 20 10 50 r 1 = 10 k r 2 = 20 k t a = 25 c 40 negative inverter i out = 15 ma negative inverter positive doubler i out = 15 ma r out = 45 w open loop r out = 2 w closed loop r1 = 10 k, r2 = 20 k t a = 25 c
ncp1729 http://onsemi.com 22 figure 52. inverter circuit board layout, top view copper side v in gnd ic1 c 1 inverter size = 0.5 in x 0.2 in area = 0.10 in 2 , 64.5 mm 2 v out gnd c 3 + c 2 + shdn + 0.5 taping form pin 1 user direction of feed component taping orientation for tsop6 devices standard reel component orientation (mark right side up) device marking tsop6 package tape width (w) pitch (p) part per full reel diameter 8 mm 4 mm 3000 7 inches tape & reel specifications table
ncp1729 http://onsemi.com 23 package dimensions tsop6 sn suffix case 318g02 issue g 23 4 5 6 a l 1 s g d b h c 0.05 (0.002) dim min max min max inches millimeters a 0.1142 0.1220 2.90 3.10 b 0.0512 0.0669 1.30 1.70 c 0.0354 0.0433 0.90 1.10 d 0.0098 0.0197 0.25 0.50 g 0.0335 0.0413 0.85 1.05 h 0.0005 0.0040 0.013 0.100 j 0.0040 0.0102 0.10 0.26 k 0.0079 0.0236 0.20 0.60 l 0.0493 0.0610 1.25 1.55 m 0 10 0 10 s 0.0985 0.1181 2.50 3.00 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. m j k
ncp1729 http://onsemi.com 24 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. ncp1729/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland

▲Up To Search▲

Price & Availability of NCP1729-D

	To Download NCP1729-D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .